BAE Systems, Raytheon to develop optical interconnects to enhance system connectivity in embedded computing
Companies eye optical interconnects for high-performance embedded computing to enhance bandwidth, power efficiency, channel density, and link reach.
ARLINGTON, Va. – U.S. military researchers are spending about $1.2 million with two U.S. military prime contractors to find ways of using optical interconnects on high-performance embedded computing boards to enhance bandwidth, power efficiency, channel density, and link reach.
Officials of the U.S. Defense Advanced Research Projects Agency (DARPA) in Arlington, Va., have awarded contracts to the Raytheon Co. and BAE Systems for the Photonics in the Package for Extreme Scalability (PIPES) program.
PIPES seeks to enable disruptive system scalability by developing optical signaling technologies for digital microelectronics. The program will employ intimate integration of photonics with advanced integrated circuits to yield unprecedented system connectivity, DARPA officials say.
DARPA announced contracts and options to BAE Systems Inc. in Arlington, Va., worth $576,355 on 28 June 2019; and to the Raytheon Co. in Waltham, Mass., on 8 July 2019 for work involved in the PIPES program.
The project seeks to integrate photonic interconnects on state-of-the-art multichip modules for system prototyping; advance embedded optical signaling performance with emerging component technologies, photonic-electronic integration techniques, scalable architectures, and multiplexing concepts; develop low-loss optical packaging and reconfigurable switching technologies; and, establish a domestic ecosystem that gives military systems designers access to new capabilities for embedded computing in-package photonic signaling.
Since the end of clock frequency scaling in the mid-2000s, the microelectronics industry progressively has embraced parallelism to sustain performance growth, DARPA researchers explain. Constraining the benefits of parallelism, however, is not computation at individual nodes, but by data movement between embedded computing nodes.
While short-reach connects is possible today between on-chip cores and within multi-chip modules using high-bandwidth electrical links, this interconnect performance rapidly degrades at the longer lengths of circuit boards and beyond because of unfavorable scaling with frequency and reach. This restricts off-chip I/O capacity, reduces system performance, and limits scalability.
Granted, photonic transceiver modules can enable optical signaling with high bandwidth and minimal loss over long distances with optical fiber, yet optical I/O typically comes in pluggable modules on circuit boards, connected to MCM packages with electrical links whose power dissipation and density limit overall performance.
Instead, DARPA researchers are trying to find improvements by reducing signaling energy and latency, while increasing overall signaling capacity and component density. This is where the PIPES project comes in.
Developing efficient, high-bandwidth, package-level photonic signaling should have substantial influence on high-performance computing, on big-data applications that use machine learning, advanced sensors, and wireless interfaces.
While optical signaling is common today in such systems at the board and rack levels, it has not yet been integrated within component switch chips, central processing units (CPUs), and graphical processing units (GPUs).
The PIPES program revolves around three technical areas: photonically enabled multichip modules; photonics for massive parallelism; and interconnect fabrics to facilitate package-level photonic I/O in future systems.
PIPES is a 42-month program divided into three phases: demonstration of concepts, components, and function; integration and prototyping; and establishing scalability, complexity, and maturity.