SynaptiCAD the Timing Diagram Co

605 Alleghany St
Blacksburg, VA 24062-0608
United States
540-953-3390
540-953-3078
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More Info on SynaptiCAD the Timing Diagram Co

Offers a line of VHDL and Verilog model generation, simulation, and timing diagram visualization tools: VeriLogger Extreme - Verilog simulator, WaveFormer Pro - waveform translator, TestBencher Pro - Test generation, Timing Diagrammer, Pro- timing diagram editor.

Products

Timing Diagrammer Pro: a timing diagram editor with the industry’s most advanced timing analysis and documentation support with delays, setups, holds, text, and markers.
TestBencher Pro drastically reduces test bench coding and verification time by automatically generating self-checking VHDL and Verilog test benches from graphically entered, reusable...
V2V: translates code to and from VHDL and Verilog with optional graphical interface that makes it easy to run the translator, fix errors, and verify the translated code.
WaveFormer Pro combines a timing diagram editor, a VHDL/Verilog stimulus generator, and an interactive simulator which makes drawing timing diagrams faster and more accurate. ...
VeriLogger Extreme by SynaptiCAD is a low-cost, full-featured Verilog simulator with built in Unit Level testing features for quick debugging. Includes waveform viewer, debugging...

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