The Model 71810 routes 38 pairs of LVDS connections from the FPGA to an 80-pin connector on the front panel. When mounted on a compatible single board computer or other XMC carrier, the Model 71810 provides a fully customizable I/O signal status and control interface.
The Jade XMC line uses personality modules to enable customization of XMC front end functions to meet customer I/O needs.
The Model 71810 can be populated with a range of Kintex UltraScale FPGAs to match specific requirements of the processing task, spanning from the entry-level KU035 (with 1,700 DSP slices) to the high-performance KU115 (with 5,520 DSP slices). The KU115 is ideal for modulation/demodulation, encoding/decoding, encryption/decryption, and channelization of the signals between transmission and reception. For applications not requiring large DSP resources or logic, a lower-cost FPGA can be installed.
The Model 71810 can be optionally configured with a P14 PMC connector with 24 pairs of LVDS connections to the FPGA for custom I/O to the carrier board or backplane. An additional option for a P16 XMC connector with an 8X gigabit link to the FPGA supports serial protocols.
With the Xilinx Kintex Ultrascale FPGA, LVDS digital I/O and gigabit serial I/O, the Model 71810 becomes an excellent high performance off-load co-processor to fit a wide assortment of processing needs.
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