DARPA Microsystems Exploration seeks revolutionary advances in military embedded computing technologies

July 16, 2019
Goal is high-risk, high-reward technologies in embedded computing materials, devices, and systems, and help create and prevent strategic surprise.

ARLINGTON, Va. – U.S. military researchers say they plan to issue three industry solicitations between now and October to improve technologies in military embedded computing.

Officials of the U.S. Defense Advanced Research Projects Agency (DARPA) Microelectronics Technology Office (MTO) in Arlington Va., will kick off the agency's Microsystems Exploration project with solicitations in board-level hardware security ferroelectric nitride materials and non-volatile memory; and massively parallel heterogeneous computing.

The goal is to develop high-risk, high-reward technologies that enable revolutionary advances in materials, devices, and systems, and help create and prevent strategic surprise.

The Microsystems Exploration program calls for fast responses with small targeted investments, with contract awards made within 90 days of each Microsystems Exploration topic announcement.

Related: DARPA eyes microelectronics optical interconnects for high-performance embedded computing boards

Each Microsystems Exploration topic will be published on www.fbo.gov, and the first topic solicitation will be numbered DARPA-PA-19-04-01. Each topic solicitation will identify details of the research topic, and provide proposal and submission instructions.

The overall focus of the Microsystems Exploration program revolves around four topics: embedded microsystem intelligence and localized processing; next-generation electromagnetic components; microsystem integration for functional density and security; and disruptive applications in command, control, communications computer, intelligence surveillance, and reconnaissance (C4ISR), electronic warfare (EW), and directed energy.

Over the next thee months the program involves board-level hardware security ferroelectric nitride materials and non-volatile memory; and massively parallel heterogeneous computing.

Board-level hardware security seeks to overcome some of the bad effects of offshoring fabrication of embedded computing components, such as insertion of supply chain implants in commercial off-the-shelf (COTS) hardware like Internet routers and computer servers.

Related: DARPA ERI:DA project focuses on integrated circuits for trusted computing and artificial intelligence

The supply chain is complex and an individual component changes hands several times, offering many opportunities for nefarious actors to introduce new components to a printed circuit board, DARPA officials explain.

This malicious circuitry remains hidden from post-manufacturing tests until its functionality is triggered. The problem is an inability to compile test patterns for every feasible kind of Trojan. Today's safeguards rely on monitoring changes against a known good sample, yet these methods may not scale sufficiently to a complex COTS system.

The goal will be to identify and demonstrate real-time detection of hardware Trojans installed in complex COTS circuit boards using single-stream or multi-modal sensing, side-channel extractions, trigger discovery via active stimulation, or performance-based machine learning architectures.

Ferroelectric nitride materials and non-volatile memory seeks to evaluate how well these materials can help the performance of scandium doped aluminum nitride (ScAlN) in device applications like RF filters, piezoelectric actuators, ultrasonic sensors, microphones, and oscillators. The relatively low synthesis temperatures of ferroelectric nitride also make such materials attractive for integration with electronics.

Related: DARPA asks industry to develop microelectronics with cooling built right into the chip

Recent work has demonstrated the emergence of ferroelectric switching behavior in scandium-doped aluminum nitride thin films when the scandium percentage exceeds 30 percent, DARPA officials explain.

Ferroelectric nitride has potential applications in devices like monolithic integration of ferroelectric non-volatile memory on CMOS; ferroelectric resistive memory; bulk acoustic wave and surface acoustic wave filters; tunable RF components; switchable electro-optical components; non-volatile logic; neuromorphic memory; and tunable two-dimensional electron gas heterostructures.

The goal is identifying the thickness and doping ranges that exhibit ferroelectric behavior, the robustness and reproducibility of the ferroelectric response, and to demonstrate ferroelectric nitrides as a technologically useful material.

Massively parallel heterogeneous computing seeks to explore creating software compiler technology that improves programming productivity in massively parallel and heterogeneous embedded computing systems.

Related: BAE Systems, Raytheon to develop optical interconnects to enhance system connectivity in embedded computing

For the last 50 years, advances in computing performance, cost, and ubiquity has rested on two key technology trends: device miniaturization and advances in programming that enable exponential hardware improvements while managing productivity and complexity.

At the hardware level, orthogonal advances in device speeds, instruction level parallelism, and microarchitecture innovation have led to aggregate performance improvements of more than 1,000,000X. At the software level, improvements in compilers, software libraries, abstraction, and collaboration led to similarly impressive productivity improvements.

Unfortunately, these advances hit a brick wall around 2005 with the saturation of per processor frequency scaling and single threaded performance.

Subsequent performance gains have come from hardware parallelism at the expense of programmer productivity. With further tapering in transistor density and performance scaling, the level of parallelism, specialization, and system heterogeneity will accelerate further, making programmer productivity an even bigger challenge.

Related: DARPA eyes trusted computing, secure chip use, and semiconductor manufacturing

Going forward, simultaneously achieving near peak performance and programming productivity in extreme heterogeneous systems will be a key challenge to enable rapid development and deployment of future hardware within the DoD SWaP constrained tactical edge.

DARPA will post frequently asked questions about the Microsystems Exploration project on the DARPA/MTO Opportunities page at (http://www.darpa.mil/work-with-us/opportunities.

Email questions or concerns about the project to DARPA at [email protected]. More information is online at https://www.fbo.gov/spg/ODA/DARPA/CMO/DARPA-SN-19-69/listing.html.

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