IARPA briefs industry on revolutionary new computers for data analytics in intelligence applications

Dec. 15, 2020
The AGILE program seeks to develop computers for large-scale data-analytic intelligence applications and other classes of large computational problems.

WASHINGTON – U.S. intelligence researchers are kicking off a project to develop revolutionary computer architectures and integrated circuits for a new class of high-performance computers for large-scale data analytics.

Officials of the U.S. Intelligence Advanced Research Project Activity (IARPA) in Washington will brief industry by virtual conference from noon to 4 p.m. eastern time on Tuesday 22 Dec. on the Advanced Graphic Intelligence Logical Computing Environment (AGILE) program (IARPA-PRS-21-01).

Explosive data growth far outpaces the ability of todays's computers to extract meaningful insights quickly because today’s computers were designed to address yesterday’s compute-intensive problems rather than today’s data-intensive problems.

Transforming massive, random, heterogeneous data streams into actionable knowledge with trusted-computing requires a rethinking of computers to one that places primary focus on data movement, storage, and access.

Related: Trusted computing: application development, testing, and analysis for optimal security

Data of interest to intelligence analysts is sparse, random, heterogeneous, and is distributed across the computer. Moreover, several applications might try to access the same data at the same time.

The AGILE program seeks to develop computers that not only can process large-scale data-analytic intelligence applications, but also that can address other classes of large problems.

The focus is on new system-level intelligent ways to move, access, and store large, random, time-varying data streams that enable scalable and efficient execution of dynamic graph analytics work flows. Proposed designs must emphasize an integrated system, not individual functionalities like memory or computation.

Related: The trusted computing implications of interfaces, and how they can influence system performance

Achieving AGILE’s goals will likely require new memory and interconnection architectures to address data structures for large, irregular, dynamic data sets, which will require massive data throughput and rapidly accessible high-density storage. Designs must demonstrate a fundamental re-thinking of the system architecture and its microelectronics components.

Designs should be efficient and scalable when executing large-scale data analytics; energy efficient; cost effective; realizable in silicon prior to 2030; open sourced or licensable.

The AGILE program will provide performers with the source code for work flows, plus work flow-based kernels and links to industry-standard benchmark codes or benchmark descriptions to be used in the co-design development process and to evaluate the performance of AGILE designs. The program is broken into two 18-month phases: architectural design, and detailed design.

Related: Lowering the costs of encrypted data storage in trusted computing

Proposed computers will have four fundamental functions: communications, memory, computation, and runtime. Key challenges involve efficient processing elements; fine-grained irregular data movement; parallelism at all levels; new memory and storage architectures; I/O subsystem that can ingest high-velocity data streams; and system security and trusted computing.

Companies interested in attending the AGILE briefings must register no later than 18 Dec. online at www.client-meeting.net/agile-conference.

More information is online at https://beta.sam.gov/opp/dcfe7fadab1c4334859d1e79269ddd19/view.

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